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Dr. S. B. PatilProfessor & CEO-SGIARC-TBI |
ACADEMIC QUALIFICATION | BE, ME, MBA, Ph.D.(VLSI- Electronics Engineering) |
AREA OF SPECIALIZATION | VLSI-Analog/RF/Mixed Signal, Embedded System |
EXPERIENCE | Teaching:17 Years |
COURSES TAUGHT | VLSI |
ORCID ID/ SCOPUS ID/ Web of Science ID/ VIDWAN ID/ RESEARCHER ID/Google Scholar ID: | |
MEMBERSHIP | IEEE |
PUBLICATIONS |
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RESEARCH AND DEVELOPMENT | Industrial solutions: 1. Automatic Fault Detection and Counting Mechanism and Analysis for Bhogle Automotive, Aurangabad 2. Transceiver IF IC Development for 5G mm Wave Radio using UMC 180nm Technology for SM Technologies Pvt.Ltd Pune |
RESEARCH GUIDANCE | |
FDP/STTP/Workshop/Training Programme Attended / Organized | |
FELLOWSHIP / AWARD | Project- Design of Operational Trnsconductance Amplifier Winner of first ever national level 'Cadence India Design Contest'. Won cash prize of Rs. 1.5 lack and reorganization at national level project competition organized by Cadence Design Systems (I) Pvt. Ltd., Bangalore, INDIA and CDNLive! India- part of Cadence's global series of technical conferences in 2006 |
OTHER | Research Guided |